Improvements in or relating to Pulse Transmission Apparatus

1,190,099. Digital transmission systems. WESTERN ELECTRIC CO. Inc. 10 Aug., 1967 [15 Aug., 1966], No. 36782/67. Heading H4P. Apparatus for converting binary pulses to bipolar form, i.e. in which successive 1-bits are represented by positive and negative pulses alternately and 0-bits by zero polarity...

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Hauptverfasser: JACK MYRON SIPRESS, VIRGIL IVANCICH JOHANNES, JOHN SULLIVAN MAYO, RICHARD HOMER MCCULLOUGH, MARVIN ROBERT AARON
Format: Patent
Sprache:eng
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Zusammenfassung:1,190,099. Digital transmission systems. WESTERN ELECTRIC CO. Inc. 10 Aug., 1967 [15 Aug., 1966], No. 36782/67. Heading H4P. Apparatus for converting binary pulses to bipolar form, i.e. in which successive 1-bits are represented by positive and negative pulses alternately and 0-bits by zero polarity, includes means for recognizing the presence of a train of n successive 0-bits and for replacing this train by a unique word which contains consecutive pulses of the same polarity. Apparatus for performing the reverse process is described. In one embodiment of the encoder, Fig. 1, in which n = 4, complementary unipolar binary pulses on leads 11, 12 pass to a 5-bit shift register comprising bi-stables 45-49 controlled by bit-rate clock pulses on line 16. Binary to polar conversion.-Suppose there are less than four consecutive 0-bits and that bi-stable 55 is set. When a 1-bit is on bi-stable 49 NAND gate 57 outputs a 1-bit but NAND 56 gives no output. Consequently NAND 60 outputs a 1-bit which passes to transformer 62, resulting in a pulse of, say, positive polarity pulse at the output. Bi-stable 55 normally changes state at the end of each bit period, under the control of bit-rate clock pulses on line 17. If the next bit on bistable 49 is a 1-bit it is therefore NAND 57 which gives no output. NAND 61 therefore outputs a 1-bit resulting in a negative polarity at the transformer output. A 0-bit on bi-stable 49 inhibits, by way of AND 65, the changeover of bi-stable 55 so that a subsequent 1-bit will cause a pulse of opposite polarity to the previous bit. The 0-bit also results in zero output from the transformer. Insertion of unique word.- NAND 70 outputs if there are four consecutive 0-bits in the binary pulses, and this output causes a 1-bit to be read into and passed through register 75-78. Consequently NAND 85 passes the word 1111 to NAND gate 87-88. The latter gates are also fed by clock pulses and by the output of bi-stable 55, so that one or other of the gates will produce a 0-bit at each bit interval. Bi-stable 55 changes state whenever bi-stables 76 or 78 output a 1-bit. If the last input 1-bit was encoded as a positive pulse, gates 87, 88, 60, 61 result in the generation of the unique word - - + +, and if the last bit was negative the word generated is + + - -. The decoder, Fig. 2 (not shown), comprises a pair of shift registers stepped by bit-rate clock pulses and fed respectively by the positive and negative pulses in the bipolar data. An AND gate is c