DISPOSITIF SEMI-CONDUCTEUR A TRANSISTORS MOS A COUCHE D'ARRET DE GRAVURE AYANT UN STRESS RESIDUEL AMELIORE ET PROCEDE DE FABRICATION D'UN TEL DISPOSITIF SEMI-CONDUCTEUR

A MOS transistor semiconductor device comprises a semiconductor substrate in which the transistors are formed, a dielectric layer covering the substrate in which the contact holes (16) are engraved and an engraving stop layer (18) interposed between the substrate and the dielectric layer. The engraving stop layer incorporates a first layer (I) of material with a first level of residual stress, which covers a part of the transistors, and a second layer (II) of material having a second level of residual stress, which covers the assembly of transistors. The thickness ( e1, e2) and the levels of residual stress (approximatelys1, approximatelys2) of these two layers are chosen in a manner to obtain some variations in the operating parameters of the transistors with respect to the transistors covered with the first layer of material. An Independent claim is also included for a method for the fabrication of this semiconductor device with MOS transistors.