MICROPROCESSEUR ET PROCEDE POUR IMBRIQUER LES ACCES EN MEMOIRE DE CE MICROPROCESSEUR
A two-bus, two instruction type, pipelined microprocessor having a control means which orders application of instruction and data addresses to a memory and further interleaves instructions and data on a single bus to achieve maximum efficiency in operation.
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| Format: | Patent |
| Sprache: | fre |
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| Zusammenfassung: | A two-bus, two instruction type, pipelined microprocessor having a control means which orders application of instruction and data addresses to a memory and further interleaves instructions and data on a single bus to achieve maximum efficiency in operation. |
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