UNITE DE MEMOIRE-TAMPON DANS UN SYSTEME DE TRAITEMENT DE DONNEES

Unité de mémoire-tampon de données dans un système de traitement de données. Cette unité de mémoire-tampon est formée de colonnes sous forme de tableaux de mémoire d'un multiplet de large, chaque tableau comportant plusieurs rangées d'un multiplet de large et son propre mécanisme d'adressage pour accéder à l'une quelconque des rangées. Un circuit de transfert de données permet de transférer de façon indépendante des segments de N multiplets entre la mémoire-tampon et un canal du système de traitement de données et des segments de M multiplets entre la mémoire-tampon et la mémoire principale du système. Une telle unité de mémoire-tampon permet de simplifier les manipulations de données et réduit au minimum le matériel nécessaire pour le transfert de données dans un système de traitement de données. Channel data buffer apparatus for buffering data being transferred between an input/output channel unit and a main storage unit in a digital data processing system. In the disclosed embodiment, data is generally transferred between the channel unit and the data buffer (a "channel/buffer" transfer) in two-byte segments and between the main storage unit and the data buffer (a "storage/buffer" transfer) in eight-byte segments. The data buffer is comprised of eight column-forming byte-wide multirow storage arrays each having its own address mechanism for accessing any desired row therein. Corresponding rows in the different storage arrays provide the corresponding eight-byte rows for the data buffer as a whole. For storage/buffer transfers, data buffer address circuitry is provided for enabling a group of eight contiguous bytes to be read out of or written into the data buffer on a single access even though some of the bytes may be located on one row of the data buffer and other of the bytes on the next row of the data buffer. For channel/buffer transfers, data buffer address circuitry is provided for enabling a group of two contiguous bytes to be read out of or written into the data buffer on a single access even though one of the bytes may be located on one row of the data buffer and the other of the bytes on the next row of the data buffer. For storage/buffer transfers, an eight-byte wrap-around data shifter is located between the data buffer and the main storage unit for enabling any necessary alignment or realignment of the data being transferred. These features enable data to be loaded into the data buffer in a packed manner and without regard to the storage wo