Taajuudenmuodostuspiiri

A frequency forming circuit according to the present invention utilizes division by a partial fraction a/b, and therein pulse removal means (2) first remove a-b pulses from the end of each consecutive period equal in length to a pulses. Thereafter, the pulse string is conducted to a digital delay line (4) consisting of serially connected, controllable elements (5) that produce essentially the same unit delay, and which includes an intermediate output before each element. Each pulse in said period is output from the delay line (4) before the element (5) whose ordinal number in the delay line is the same as the ordinal number of the pulse in said period. A multiplexer (7) receives the pulses from the intermediate outputs of the digital delay line and combines them to form a new pulse string. Control means (6) cause the control elements (5) of the digital delay line (4) to produce an average unit delay (a-b)*t/b with the same control.