ACCELERATING LOW-DENSITY PARITY-CHECK DECODING VIA SCHEDULING, AND RELATED DEVICES, METHODS AND COMPUTER PROGRAMS

ACCELERATING LOW-DENSITY PARITY-CHECK DECODING VIA SCHEDULING, AND RELATED DEVICES, METHODS AND COMPUTER PROGRAMS

Devices, methods and computer programs for accelerating low-density parity-check (LDPC) decoding via scheduling are disclosed. At least some of the example embodiments de-scribed herein may allow reducing cost and improving power efficiency beyond that of semiconductor processor scaling currently us...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: LING, Jonathan, CAUTEREELS, Paul
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
BASIC ELECTRONIC CIRCUITRY
CODE CONVERSION IN GENERAL
CODING
DECODING
ELECTRICITY
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Beschreibung
Zusammenfassung:Devices, methods and computer programs for accelerating low-density parity-check (LDPC) decoding via scheduling are disclosed. At least some of the example embodiments de-scribed herein may allow reducing cost and improving power efficiency beyond that of semiconductor processor scaling currently used in accelerating LDPC decoding.