SYSTEM AND METHOD FOR GENERATION OF A NETWORK USING PHYSICAL AWARENESS DATA FROM AN IMAGE OF A CHIP FLOORPLAN

SYSTEM AND METHOD FOR GENERATION OF A NETWORK USING PHYSICAL AWARENESS DATA FROM AN IMAGE OF A CHIP FLOORPLAN

Floorplanning for a semiconductor chip includes loading an image of a first floorplan of the chip; converting the digital image to a grayscale image; detecting blockages in the grayscale image; and generating a second floorplan corresponding to the first floorplan. The second floorplan shows represe...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: PEZLEY, Christopher, VAN RUYMBEKE, Xavier, MONTEIRO, Simon, CHARIF, Amir
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:Floorplanning for a semiconductor chip includes loading an image of a first floorplan of the chip; converting the digital image to a grayscale image; detecting blockages in the grayscale image; and generating a second floorplan corresponding to the first floorplan. The second floorplan shows representations of the blockages and maximum available area for a network-on-chip (NoC).