SAMPLE GENERATION USING PIPELINED PROCESSING UNITS

A device includes a memory configured to store instructions and a processor coupled to the memory. The processor includes a first processing unit configured to perform a first stage of a sample synthesis operation. The processor includes a second processing unit configured to perform a second stage...

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Bibliographische Detailangaben
Hauptverfasser: SKORDILIS, Zisis Iason, KULKARNI, Prajakt, RAJENDRAN, Vivek
Format: Patent
Sprache:eng ; fre ; ger
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Zusammenfassung:A device includes a memory configured to store instructions and a processor coupled to the memory. The processor includes a first processing unit configured to perform a first stage of a sample synthesis operation. The processor includes a second processing unit configured to perform a second stage of the sample synthesis operation based on an output of the first processing unit. The processor also includes a sample synthesizer configured to process input data, using the first processing unit and the second processing unit, to generate output data. The first processing unit and the second processing unit are configured to operate in a pipelined configuration that includes performance of the second stage at the second processing unit in parallel with performance of the first stage at the first processing unit.