3D SEMICONDUCTOR PACKAGE WITH DIE-MOUNTED VOLTAGE REGULATOR

A semiconductor package includes a package substrate having a first surface and an opposing second surface, and further includes an integrated circuit (IC) die disposed at the second surface and having a third surface facing the second surface and an opposing fourth surface. The IC die has a first r...

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Bibliographische Detailangaben
Hauptverfasser: WILKERSON, Brett P, LOH, Gabriel H, SWAMINATHAN, Raja, AGARWAL, Rahul
Format: Patent
Sprache:eng ; fre ; ger
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Beschreibung
Zusammenfassung:A semiconductor package includes a package substrate having a first surface and an opposing second surface, and further includes an integrated circuit (IC) die disposed at the second surface and having a third surface facing the second surface and an opposing fourth surface. The IC die has a first region comprising one or more metal layers and circuit components for one or more functions of the IC die and a second region offset from the first region in a direction parallel with the third and fourth surfaces. The semiconductor package further includes a voltage regulator disposed at the fourth surface in the second region and having an input configured to receive a supply voltage and an output configured to provide a regulated voltage, and also includes a conductive path coupling the output of the voltage regulator to a voltage input of circuitry of the IC die.