SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF

A semiconductor structure includes a substrate including a first surface (12A) and a second surface (12B) opposite to each other, and a unit region (R1) and a terminal region (R2) adjacent to each other. An electrode structure (50) in the substrate extends from the first surface toward the second su...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: CHUANG, Chiao-Shun, KUO, TaChuan
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator CHUANG, Chiao-Shun
KUO, TaChuan
description A semiconductor structure includes a substrate including a first surface (12A) and a second surface (12B) opposite to each other, and a unit region (R1) and a terminal region (R2) adjacent to each other. An electrode structure (50) in the substrate extends from the first surface toward the second surface in the unit region. A trench structure (60) in the substrate extends from the first surface toward the second surface in the unit region and adjoins the terminal region. The trench structure includes a semiconductor material layer (162) extending to the first surface. A capacitive structure on the first surface of the substrate in the terminal region adjoins the trench structure. The capacitive structure has a material the same as the semiconductor material layer, and has a capacitive electrode (163) connected to the semiconductor material layer. A method for manufacturing the semiconductor structure is also provided.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP4451333A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP4451333A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP4451333A13</originalsourceid><addsrcrecordid>eNrjZLAIdvX1dPb3cwl1DvEPUggOCQIyQoNcFRz9XBR8Hf1C3RxBfE8_dwVf1xAPfxeFEA_XIFd_Nx4G1rTEnOJUXijNzaDg5hri7KGbWpAfn1pckJicmpdaEu8aYGJiamhsbOxoaEyEEgBM5Ch6</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF</title><source>esp@cenet</source><creator>CHUANG, Chiao-Shun ; KUO, TaChuan</creator><creatorcontrib>CHUANG, Chiao-Shun ; KUO, TaChuan</creatorcontrib><description>A semiconductor structure includes a substrate including a first surface (12A) and a second surface (12B) opposite to each other, and a unit region (R1) and a terminal region (R2) adjacent to each other. An electrode structure (50) in the substrate extends from the first surface toward the second surface in the unit region. A trench structure (60) in the substrate extends from the first surface toward the second surface in the unit region and adjoins the terminal region. The trench structure includes a semiconductor material layer (162) extending to the first surface. A capacitive structure on the first surface of the substrate in the terminal region adjoins the trench structure. The capacitive structure has a material the same as the semiconductor material layer, and has a capacitive electrode (163) connected to the semiconductor material layer. A method for manufacturing the semiconductor structure is also provided.</description><language>eng ; fre ; ger</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20241023&amp;DB=EPODOC&amp;CC=EP&amp;NR=4451333A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20241023&amp;DB=EPODOC&amp;CC=EP&amp;NR=4451333A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CHUANG, Chiao-Shun</creatorcontrib><creatorcontrib>KUO, TaChuan</creatorcontrib><title>SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF</title><description>A semiconductor structure includes a substrate including a first surface (12A) and a second surface (12B) opposite to each other, and a unit region (R1) and a terminal region (R2) adjacent to each other. An electrode structure (50) in the substrate extends from the first surface toward the second surface in the unit region. A trench structure (60) in the substrate extends from the first surface toward the second surface in the unit region and adjoins the terminal region. The trench structure includes a semiconductor material layer (162) extending to the first surface. A capacitive structure on the first surface of the substrate in the terminal region adjoins the trench structure. The capacitive structure has a material the same as the semiconductor material layer, and has a capacitive electrode (163) connected to the semiconductor material layer. A method for manufacturing the semiconductor structure is also provided.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAIdvX1dPb3cwl1DvEPUggOCQIyQoNcFRz9XBR8Hf1C3RxBfE8_dwVf1xAPfxeFEA_XIFd_Nx4G1rTEnOJUXijNzaDg5hri7KGbWpAfn1pckJicmpdaEu8aYGJiamhsbOxoaEyEEgBM5Ch6</recordid><startdate>20241023</startdate><enddate>20241023</enddate><creator>CHUANG, Chiao-Shun</creator><creator>KUO, TaChuan</creator><scope>EVB</scope></search><sort><creationdate>20241023</creationdate><title>SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF</title><author>CHUANG, Chiao-Shun ; KUO, TaChuan</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP4451333A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2024</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>CHUANG, Chiao-Shun</creatorcontrib><creatorcontrib>KUO, TaChuan</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CHUANG, Chiao-Shun</au><au>KUO, TaChuan</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF</title><date>2024-10-23</date><risdate>2024</risdate><abstract>A semiconductor structure includes a substrate including a first surface (12A) and a second surface (12B) opposite to each other, and a unit region (R1) and a terminal region (R2) adjacent to each other. An electrode structure (50) in the substrate extends from the first surface toward the second surface in the unit region. A trench structure (60) in the substrate extends from the first surface toward the second surface in the unit region and adjoins the terminal region. The trench structure includes a semiconductor material layer (162) extending to the first surface. A capacitive structure on the first surface of the substrate in the terminal region adjoins the trench structure. The capacitive structure has a material the same as the semiconductor material layer, and has a capacitive electrode (163) connected to the semiconductor material layer. A method for manufacturing the semiconductor structure is also provided.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng ; fre ; ger
recordid cdi_epo_espacenet_EP4451333A1
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-05T22%3A09%3A34IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=CHUANG,%20Chiao-Shun&rft.date=2024-10-23&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EEP4451333A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true