ZERO-STRESS ZONES AND CONTROLLED-FRACTURING ZONES IN THE PASSIVATION LAYER OF A SEMICONDUCTOR DEVICE

ZERO-STRESS ZONES AND CONTROLLED-FRACTURING ZONES IN THE PASSIVATION LAYER OF A SEMICONDUCTOR DEVICE

A method of manufacturing a semiconductor device, such as a power MOSFET, comprising: forming a metal layer, the metal layer including an edge where the metal layer ends; forming a passivation layer at a layer higher than the metal layer; and forming a passivation slot in the passivation layer, wher...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Patel, Hamza Hanif, Yogeswaran, Nivasan, Gajda, Mark Andrzej
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:A method of manufacturing a semiconductor device, such as a power MOSFET, comprising: forming a metal layer, the metal layer including an edge where the metal layer ends; forming a passivation layer at a layer higher than the metal layer; and forming a passivation slot in the passivation layer, wherein the passivation slot is at least partially positioned over the metal layer, and wherein the passivation slot divides the passivation layer into multiple regions, wherein each region experiences a reduced tensile stress σSiNx as a result of the passivation slot.