PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD

PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD

A printed circuit board (100), PCB, comprises a top surface (101), a bottom surface (107), a series of M castellated orifices (102) on at least one of the edges of the PCB, and a series of N conductive pads (103) on the top surface (101) connecting to the M orifices (102) at respective connection ed...

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Hauptverfasser: Gergis, Anthony, Saarnimo, Timo
Format: Patent
Sprache:eng ; fre ; ger
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CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
PRINTED CIRCUITS
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creator Gergis, Anthony
Saarnimo, Timo
description A printed circuit board (100), PCB, comprises a top surface (101), a bottom surface (107), a series of M castellated orifices (102) on at least one of the edges of the PCB, and a series of N conductive pads (103) on the top surface (101) connecting to the M orifices (102) at respective connection edges (104), wherein M and N are integers greater than 1. Each of the pads (103) on the top surface (101) is partially covered by a respective spacer (105) such that an area between the connection edge (104) and a border (106) of a remaining pad area (103') is completely covered by the spacer (105), and the connection edge (104) and the border (106) of the remaining pad area (103') have a minimum distance of D, wherein D is a positive number. A solder leaking is prevented between the pads (103) on the top surface (101) and the castellated orifices (102) by the spacers (105).
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP4447623A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP4447623A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP4447623A13</originalsourceid><addsrcrecordid>eNrjZNALCPL0C3F1UXD2DHIO9QxRcPJ3DHJRcPRzUfB19At1c3QOCQWqcFfwdQ3x8HfhYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxrgEmJibmZkbGjobGRCgBAJZ-JVI</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD</title><source>esp@cenet</source><creator>Gergis, Anthony ; Saarnimo, Timo</creator><creatorcontrib>Gergis, Anthony ; Saarnimo, Timo</creatorcontrib><description>A printed circuit board (100), PCB, comprises a top surface (101), a bottom surface (107), a series of M castellated orifices (102) on at least one of the edges of the PCB, and a series of N conductive pads (103) on the top surface (101) connecting to the M orifices (102) at respective connection edges (104), wherein M and N are integers greater than 1. Each of the pads (103) on the top surface (101) is partially covered by a respective spacer (105) such that an area between the connection edge (104) and a border (106) of a remaining pad area (103') is completely covered by the spacer (105), and the connection edge (104) and the border (106) of the remaining pad area (103') have a minimum distance of D, wherein D is a positive number. A solder leaking is prevented between the pads (103) on the top surface (101) and the castellated orifices (102) by the spacers (105).</description><language>eng ; fre ; ger</language><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20241016&amp;DB=EPODOC&amp;CC=EP&amp;NR=4447623A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20241016&amp;DB=EPODOC&amp;CC=EP&amp;NR=4447623A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Gergis, Anthony</creatorcontrib><creatorcontrib>Saarnimo, Timo</creatorcontrib><title>PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD</title><description>A printed circuit board (100), PCB, comprises a top surface (101), a bottom surface (107), a series of M castellated orifices (102) on at least one of the edges of the PCB, and a series of N conductive pads (103) on the top surface (101) connecting to the M orifices (102) at respective connection edges (104), wherein M and N are integers greater than 1. Each of the pads (103) on the top surface (101) is partially covered by a respective spacer (105) such that an area between the connection edge (104) and a border (106) of a remaining pad area (103') is completely covered by the spacer (105), and the connection edge (104) and the border (106) of the remaining pad area (103') have a minimum distance of D, wherein D is a positive number. A solder leaking is prevented between the pads (103) on the top surface (101) and the castellated orifices (102) by the spacers (105).</description><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNALCPL0C3F1UXD2DHIO9QxRcPJ3DHJRcPRzUfB19At1c3QOCQWqcFfwdQ3x8HfhYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxrgEmJibmZkbGjobGRCgBAJZ-JVI</recordid><startdate>20241016</startdate><enddate>20241016</enddate><creator>Gergis, Anthony</creator><creator>Saarnimo, Timo</creator><scope>EVB</scope></search><sort><creationdate>20241016</creationdate><title>PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD</title><author>Gergis, Anthony ; Saarnimo, Timo</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP4447623A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2024</creationdate><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PRINTED CIRCUITS</topic><toplevel>online_resources</toplevel><creatorcontrib>Gergis, Anthony</creatorcontrib><creatorcontrib>Saarnimo, Timo</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Gergis, Anthony</au><au>Saarnimo, Timo</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD</title><date>2024-10-16</date><risdate>2024</risdate><abstract>A printed circuit board (100), PCB, comprises a top surface (101), a bottom surface (107), a series of M castellated orifices (102) on at least one of the edges of the PCB, and a series of N conductive pads (103) on the top surface (101) connecting to the M orifices (102) at respective connection edges (104), wherein M and N are integers greater than 1. Each of the pads (103) on the top surface (101) is partially covered by a respective spacer (105) such that an area between the connection edge (104) and a border (106) of a remaining pad area (103') is completely covered by the spacer (105), and the connection edge (104) and the border (106) of the remaining pad area (103') have a minimum distance of D, wherein D is a positive number. A solder leaking is prevented between the pads (103) on the top surface (101) and the castellated orifices (102) by the spacers (105).</abstract><oa>free_for_read</oa></addata></record>
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subjects CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
PRINTED CIRCUITS
title PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-31T03%3A49%3A10IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Gergis,%20Anthony&rft.date=2024-10-16&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EEP4447623A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true