CROSS-CELL LOCAL INTERCONNECT WITH BURIED POWER RAIL AND GATE CONTACT OVER ACTIVE REGION

A semiconductor device is presented that includes source/drain epitaxial regions disposed over a substrate, source/drain contacts (CA) disposed in direct contact with the source/drain epitaxial regions, where at least one of the CA contacts directly contacts a buried power rail or backside power rail through a via-to-BPR (VBPR) contact, a dielectric cap disposed over one or more of the CA contacts, and a local interconnect constructed in direct contact with one area of the dielectric cap such that a portion of the local interconnect is vertically aligned with the backside power rail. A backside power distribution network (BSPDN) is disposed adjacent the backside power rail.