BACK SIDE INTERCONNECT PATTERNING AND FRONT SIDE METAL INTERCONNECT ON A TRANSISTOR LAYER

BACK SIDE INTERCONNECT PATTERNING AND FRONT SIDE METAL INTERCONNECT ON A TRANSISTOR LAYER

Embodiments described herein may be related to apparatuses, processes, systems, and/or techniques for forming a package that has a transistor layer with a front side metal interconnect layer and a back side metal contact and interconnect layer. In particular, back side metal contact and interconnect...

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Bibliographische Detailangaben
Hauptverfasser: MILLS, Shaun, KOBRINSKY, Mauro J, MANNEBACH, Ehren, D'SILVA, Joseph
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:Embodiments described herein may be related to apparatuses, processes, systems, and/or techniques for forming a package that has a transistor layer with a front side metal interconnect layer and a back side metal contact and interconnect layer. In particular, back side metal contact and interconnect layers may be patterned before a transistor layer, or other device layer, is formed on the patterned layers and before front side metal interconnect layers are formed on the transistor layer. Other embodiments may be described and/or claimed.