REDUCED POWER CONSUMPTION CIRCUIT AND CORRESPONDING METHOD

A system on chip, SOC circuit comprising a plurality of peripherals (1811, 1812, ..., 181k; ...; 18N1, 18N2, ..., 18Nk) configured to be clocked with respective clock signals (CK11, CK12, ..., CK1k; ..., CKN1, CKN2, ..., CKNk), wherein the circuit comprises a clock controller (217) configured (161,...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	MONDELLO, Antonino, INGLESE, Alessandro, CONDORELLI, Riccardo
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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