NON-VOLATILE MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME

A non-volatile memory device includes a peripheral circuit structure and a cell array structure on the peripheral circuit structure, where the cell array structure includes a base insulation layer, a common source line layer on the base insulation layer, a buffer insulation layer on the common source line layer, and a cell stack on the buffer insulation layer, where the cell stack includes a plurality of gate electrodes and a plurality of insulation layers, where the plurality of gate electrodes have a staircase shape, a plurality of gate contact plugs that extend into the cell stack, and a plurality of protection structures between the plurality of gate contact plugs and the base insulation layer.