MULTI-PHASE CLOCK GENERATION DEVICE

Multiphase clock generation device (100), comprising:- an input (1) for feeding a reference clock (CLKp0);- a clock generation unit (10) adapted to generate phase-shifted clock signals from the reference clock (CLKp0);- a phase comparator unit (20) functionally coupled with the clock generation unit...

Ausführliche Beschreibung

Gespeichert in:

Bibliographische Detailangaben
Hauptverfasser:	van Sinderen, Jan, Baier, Thomas, Fleischhacker, Jens
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES BASIC ELECTRONIC CIRCUITRY ELECTRICITY
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!

Beschreibung
Zusammenfassung:	Multiphase clock generation device (100), comprising:- an input (1) for feeding a reference clock (CLKp0);- a clock generation unit (10) adapted to generate phase-shifted clock signals from the reference clock (CLKp0);- a phase comparator unit (20) functionally coupled with the clock generation unit (10), wherein the phase comparator unit (20) is adapted to measure a phase shift (ε) of the phase-shifted clock signals; and- a self-calibration unit (30) functionally coupled with the clock generation unit (10), wherein the calibration unit (30) outputs a delay-calibration parameter (dset) to the clock generation unit (10), wherein the clock generation unit (10) is adapted to generate a multiphase clock signal (CLKMP) out of the reference clock (CLKp0) and the delay-calibration parameter (dset).