ERROR CORRECTION CODE VALIDATION

A memory device comprising a memory array including memory cells to store memory data, error correcting code (ECC) circuitry configured to generate ECC data and use the ECC data to detect errors in the memory data, and an ECC circuitry checker. The ECC circuitry checker is configured to substitute t...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: CALLANAN, Andreas, CHIW, Bernard Sherwin Leung, MEANY, Thomas, BRADLEY, Shaun Stephen, CROWE, Pat
Format: Patent
Sprache:eng ; fre ; ger
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Beschreibung
Zusammenfassung:A memory device comprising a memory array including memory cells to store memory data, error correcting code (ECC) circuitry configured to generate ECC data and use the ECC data to detect errors in the memory data, and an ECC circuitry checker. The ECC circuitry checker is configured to substitute the ECC data with check ECC data, compare an output of the ECC circuitry to an expected output when the substituted check ECC data is applied to the ECC circuitry, and generate an alert when the comparing indicates an error in the ECC circuitry.