SEMICONDUCTOR DIE AND METHOD OF MANUFACTURING THE SAME
The disclosure relates to a semiconductor die (1) comprising a vertical transistor device (10) having a gate electrode (11) in a gate trench (12), and a MOS gated diode MGD (20) having an MGD gate electrode (21) in an MGD trench (22), wherein the gate trench (12) of the transistor device (10) has an...
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creator | FEIL, Thomas Martin MARAK, Arnold WUTTE, Britta |
description | The disclosure relates to a semiconductor die (1) comprising a vertical transistor device (10) having a gate electrode (11) in a gate trench (12), and a MOS gated diode MGD (20) having an MGD gate electrode (21) in an MGD trench (22), wherein the gate trench (12) of the transistor device (10) has an elongated extension in a first lateral direction (31), and wherein the transistor device (10) and the MOS gated diode (20) are arranged consecutive in the first lateral direction (31). |
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fre ; ger</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240828&DB=EPODOC&CC=EP&NR=4421877A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240828&DB=EPODOC&CC=EP&NR=4421877A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>FEIL, Thomas Martin</creatorcontrib><creatorcontrib>MARAK, Arnold</creatorcontrib><creatorcontrib>WUTTE, Britta</creatorcontrib><title>SEMICONDUCTOR DIE AND METHOD OF MANUFACTURING THE SAME</title><description>The disclosure relates to a semiconductor die (1) comprising a vertical transistor device (10) having a gate electrode (11) in a gate trench (12), and a MOS gated diode MGD (20) having an MGD gate electrode (21) in an MGD trench (22), wherein the gate trench (12) of the transistor device (10) has an elongated extension in a first lateral direction (31), and wherein the transistor device (10) and the MOS gated diode (20) are arranged consecutive in the first lateral direction (31).</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDALdvX1dPb3cwl1DvEPUnDxdFVw9HNR8HUN8fB3UfB3U_B19At1c3QOCQ3y9HNXCPFwVQh29HXlYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxrgEmJkaGFubmjobGRCgBALSKJ1w</recordid><startdate>20240828</startdate><enddate>20240828</enddate><creator>FEIL, Thomas Martin</creator><creator>MARAK, Arnold</creator><creator>WUTTE, Britta</creator><scope>EVB</scope></search><sort><creationdate>20240828</creationdate><title>SEMICONDUCTOR DIE AND METHOD OF MANUFACTURING THE SAME</title><author>FEIL, Thomas Martin ; MARAK, Arnold ; WUTTE, Britta</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP4421877A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2024</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>FEIL, Thomas Martin</creatorcontrib><creatorcontrib>MARAK, Arnold</creatorcontrib><creatorcontrib>WUTTE, Britta</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>FEIL, Thomas Martin</au><au>MARAK, Arnold</au><au>WUTTE, Britta</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR DIE AND METHOD OF MANUFACTURING THE SAME</title><date>2024-08-28</date><risdate>2024</risdate><abstract>The disclosure relates to a semiconductor die (1) comprising a vertical transistor device (10) having a gate electrode (11) in a gate trench (12), and a MOS gated diode MGD (20) having an MGD gate electrode (21) in an MGD trench (22), wherein the gate trench (12) of the transistor device (10) has an elongated extension in a first lateral direction (31), and wherein the transistor device (10) and the MOS gated diode (20) are arranged consecutive in the first lateral direction (31).</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | SEMICONDUCTOR DIE AND METHOD OF MANUFACTURING THE SAME |
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