SEMICONDUCTOR DEVICE INCLUDING 3D-STACKED FIELD-EFFECT TRANSISTORS HAVING ISOLATION STRUCTURE BETWEEN CONTACT PLUGS
Provided is a semiconductor device including a 3DSFET device which includes: a 1st source/drain region; a 2nd source/drain region (223), above the 1st source/drain region, having a smaller width than the 1st source/drain region, the 2nd source/drain region being isolated from the 1st source/drain re...
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Format: | Patent |
Sprache: | eng ; fre ; ger |
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Zusammenfassung: | Provided is a semiconductor device including a 3DSFET device which includes: a 1st source/drain region; a 2nd source/drain region (223), above the 1st source/drain region, having a smaller width than the 1st source/drain region, the 2nd source/drain region being isolated from the 1st source/drain region by a 1st isolation structure (216); a 1st contact plug (217) on the 1st source/drain region; a 2nd contact plug (227) on the 2nd source/drain region; and a 2nd isolation structure (250), between the 1st contact plug and the 2nd contact plug, isolating the 2nd contact plug from the 1st contact plug, wherein the 2nd isolation structure is different and formed separately from the 1st isolation structure. |
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