DISPLAY SUBSTRATE AND DISPLAY APPARATUS

A display substrate and a display apparatus. The display substrate comprises: a base and a circuit structure layer arranged thereon. The circuit structure layer comprises pixel circuits (P), a scan driving circuit, a control driving circuit and a buffer driving circuit. Each pixel circuit (P) comprises: a node reset transistor (T1), a write-in transistor (T4), a reset signal line (RL), a scan signal line (GL) and a control signal line (SL), the reset signal line (RL) being connected to a control electrode of the node reset transistor (T1), and the scan signal line (GL) being connected to a control electrode of the write-in transistor (T4). The reset signal lines (RL1-RLK) of the pixel circuits (P) in first to Kth rows are electrically connected to the buffer driving circuit, and the reset signal lines (RLK+1-RLN) of the pixel circuits (P) in (K+1)th to Nth rows are electrically connected to the scan driving circuit or the control driving circuit, K allowing, of a pixel circuit (P), a difference between the start time of an active level of a signal on the scan signal line (GL) or on the control signal line (SL) and the end time of an active level of a signal on the reset signal line (RL) to be greater than or equal to a threshold time.