MEMORY DEVICE INCLUDING VERTICAL CHANNEL TRANSISTOR AND ELECTRONIC DEVICE INCLUDING THE SAME

A memory device includes a read word line on a substrate, a first channel extending along a plane perpendicular to an upper surface of the substrate, a second channel facing the first channel in parallel, a first gate insulation layer adjacent to the first channel between the first channel and the second channel, a second gate insulation layer adjacent to the second channel between the first channel and the second channel, a gate electrode adjacent to the first gate insulation layer between the first gate insulation layer and the second gate insulation layer, a write word line adjacent to the second gate insulation layer between the first gate insulation layer and the second gate insulation layer, a read bit line electrically connected to the first channel, and a write bit line electrically connected to the second channel.