RECEIVER CIRCUIT, CORRESPONDING ISOLATED DRIVER DEVICE, ELECTRONIC SYSTEM AND METHOD OF DECODING A DIFFERENTIAL SIGNAL INTO A DIGITAL OUTPUT SIGNAL

A receiver circuit (104') receives a differential signal (Vd) that includes positive and negative spikes. A first comparator (42) produces an intermediate set signal (COMPN) that includes a pulse at each positive spike of the differential signal, and a second comparator (44) produces an intermediate reset signal (COMPP) that includes a pulse at each negative spike of the differential signal. A sensing circuit (80) extracts a common-mode voltage signal (VCM,sense) from the differential signal and asserts a control signal (VC1, VC2) when the amplitude of the common-mode voltage signal exceeds a threshold (Vth+, Vth-). A logic circuit (81) asserts a masking signal (MASK) for a masking time interval in response to the control signal (VC1, VC2) being asserted, and de-asserts the masking signal in response to the masking time interval elapsing. The logic circuit produces (87) a corrected set signal (COMP'N) by passing the intermediate set signal (COMPN) when the masking signal (MASK) is de-asserted and masking the intermediate set signal (COMPN) when the masking signal (MASK) is de-asserted. The logic circuit produces (88) a corrected reset signal (COMP'P) by passing the intermediate reset signal (COMPP) when the masking signal (MASK) is de-asserted and masking the intermediate reset signal (COMPP) when the masking signal (MASK) is de-asserted. An output circuit (46) asserts an output signal (PWMRX) in response to a pulse detected in the corrected set signal (COMP'N) and de-asserts the output signal (PWMRX) in response to a pulse detected in the corrected reset signal (COMP'P).