LOGICAL SLOT TO HARDWARE SLOT MAPPING FOR GRAPHICS PROCESSORS

Disclosed techniques relate to work distribution in graphics processors. In some embodiments, an apparatus includes circuitry that implements a plurality of logical slots and a set of graphics processor sub-units that each implement multiple distributed hardware slots. The circuitry may determine di...

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Bibliographische Detailangaben
Hauptverfasser:	FISHWICK, Steven, WILDER, Mladen, GOTWALT, David A, HAVLIR, Andrew M, BOWMAN, Benjamin, MACGARRY, Fergus W, VELEZ, Melissa L, TAYLOR, Ralph C, RABBANI RANKOUHI, Ali
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING IMAGE DATA PROCESSING OR GENERATION, IN GENERAL PHYSICS
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Beschreibung
Zusammenfassung:	Disclosed techniques relate to work distribution in graphics processors. In some embodiments, an apparatus includes circuitry that implements a plurality of logical slots and a set of graphics processor sub-units that each implement multiple distributed hardware slots. The circuitry may determine different distribution rules for first and second sets of graphics work and map logical slots to distributed hardware slots based on the distribution rules. In various embodiments, disclosed techniques may advantageously distribute work efficiently across distributed shader processors for graphics kicks of various sizes.