DISPLAY DRIVER INTEGRATED CIRCUIT, SYSTEM-ON-CHIP, AND DISPLAY SYSTEM INCLUDING THE SYSTEM-ON-CHIP

A display driver integrated circuit, System-On-Chip, and display system including the System-On-Chip are provided. A display driver integrated circuit includes: a clock generator configured to generate an internal operating clock (Panel_clk); and a control circuit configured to provide a data signal to a pixel array based on the internal operating clock, wherein the data signal corresponds to frame data, wherein the control circuit is further configured to, in a frame data update period: receive first frame data, perform a first synchronization operation on the internal operating clock based on the first frame data, and provide a first data signal to the pixel array, and wherein the control circuit is further configured to, in a low power mode (LPM) period when an update of the frame data is not performed: transmit a sync request signal (Req) based on a result of monitoring a state of a display panel, receive a frequency signal (AP_Freq) from a System-on-Chip in response to the sync request signal , and perform a second synchronization operation on the internal operating clock based on the frequency signal.