PRINTED WIRING BOARD AND INFORMATION PROCESSING APPARATUS
There is provided a printed wiring board 101 including an outermost conductive layer that includes a plurality of conductive pads 40, a first conductive layer that includes a first inner-layer wiring and is stacked on the conductive layer, a second conductive layer that includes a second inner-layer...
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| creator | YAMAMOTO, Keisuke UEMATSU, Yutaka ONOE, Shinsuke OSHIMA, Yohei HAMAMOTO, Goro |
| description | There is provided a printed wiring board 101 including an outermost conductive layer that includes a plurality of conductive pads 40, a first conductive layer that includes a first inner-layer wiring and is stacked on the conductive layer, a second conductive layer that includes a second inner-layer wiring and is stacked on the conductive layer and the first conductive layer, a first signal via that connects one of the conductive pads and the first inner-layer wiring with each other, a second signal via connecting another one of the conductive pads and the second inner-layer wiring with each other, and a stitching via 60 that is connected to a ground. The first inner-layer wiring and the second inner-layer wiring form a common wiring route in which the first inner-layer wiring and the second inner-layer wiring are stacked and disposed in a connection area in which the conductive pads 40 are arranged. |
| format | Patent |
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The first inner-layer wiring and the second inner-layer wiring form a common wiring route in which the first inner-layer wiring and the second inner-layer wiring are stacked and disposed in a connection area in which the conductive pads 40 are arranged.</description><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAMCPL0C3F1UQj3BDLcFZz8HYNcFBz9XBQ8_dz8g3wdQzz9_RQCgvydXYODQQocAwIcgxxDQoN5GFjTEnOKU3mhNDeDgptriLOHbmpBfnxqcUFicmpeakm8a4CJsbGxqZmZo6ExEUoAVA8omQ</recordid><startdate>20240306</startdate><enddate>20240306</enddate><creator>YAMAMOTO, Keisuke</creator><creator>UEMATSU, Yutaka</creator><creator>ONOE, Shinsuke</creator><creator>OSHIMA, Yohei</creator><creator>HAMAMOTO, Goro</creator><scope>EVB</scope></search><sort><creationdate>20240306</creationdate><title>PRINTED WIRING BOARD AND INFORMATION PROCESSING APPARATUS</title><author>YAMAMOTO, Keisuke ; UEMATSU, Yutaka ; ONOE, Shinsuke ; OSHIMA, Yohei ; HAMAMOTO, Goro</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP4333566A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2024</creationdate><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PRINTED CIRCUITS</topic><toplevel>online_resources</toplevel><creatorcontrib>YAMAMOTO, Keisuke</creatorcontrib><creatorcontrib>UEMATSU, Yutaka</creatorcontrib><creatorcontrib>ONOE, Shinsuke</creatorcontrib><creatorcontrib>OSHIMA, Yohei</creatorcontrib><creatorcontrib>HAMAMOTO, Goro</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>YAMAMOTO, Keisuke</au><au>UEMATSU, Yutaka</au><au>ONOE, Shinsuke</au><au>OSHIMA, Yohei</au><au>HAMAMOTO, Goro</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>PRINTED WIRING BOARD AND INFORMATION PROCESSING APPARATUS</title><date>2024-03-06</date><risdate>2024</risdate><abstract>There is provided a printed wiring board 101 including an outermost conductive layer that includes a plurality of conductive pads 40, a first conductive layer that includes a first inner-layer wiring and is stacked on the conductive layer, a second conductive layer that includes a second inner-layer wiring and is stacked on the conductive layer and the first conductive layer, a first signal via that connects one of the conductive pads and the first inner-layer wiring with each other, a second signal via connecting another one of the conductive pads and the second inner-layer wiring with each other, and a stitching via 60 that is connected to a ground. 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| language | eng ; fre ; ger |
| recordid | cdi_epo_espacenet_EP4333566A1 |
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| subjects | CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PRINTED CIRCUITS |
| title | PRINTED WIRING BOARD AND INFORMATION PROCESSING APPARATUS |
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