SEMICONDUCTOR DEVICE

A semiconductor device may include lower metal wirings (154, 166, 176, 186, 196) on a substrate (100), a first upper insulating interlayer (200) on the lower metal wirings (154, 166, 176, 186, 196), a first upper wiring (208) including a first upper via (202) in the first upper insulating interlayer (200) and a first upper metal pattern (204) on the first upper insulating interlayer (200). The semiconductor device includes a second upper insulating interlayer (210) on the first upper insulating interlayer (200), an uppermost wiring (218) including an uppermost via (212) in the second upper insulating interlayer (210), an uppermost metal pattern (214) on the second upper insulating interlayer (210), and an oxide layer (220) for supplying hydrogen on the second upper insulating interlayer (210). The lower metal wirings (154, 166, 176, 186, 196) are stacked in a plurality of layers. The oxide layer (120) for supplying hydrogen covers the uppermost wiring (218). A thickness of the uppermost via (202) may be less than 40% of a thickness of the uppermost metal pattern (214).