LOW-DROPOUT (LDO) VOLTAGE REGULATOR WITH VOLTAGE DROOP COMPENSATION CIRCUIT

The disclosure relates to an apparatus including: a first set of one or more field effect transistors (FETs) coupled between a first voltage rail and a load; a second set of one or more FETs coupled between the first voltage rail and the load; a gate voltage control circuit configured to: provide a...

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Bibliographische Detailangaben
Hauptverfasser:	GUAN, Hua, MENG, Xiaodong, PAN, Yufei, YANG, Fan, JIANG, Jize, KOAY, Kuan Chuang
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	CONTROLLING PHYSICS REGULATING SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
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Beschreibung
Zusammenfassung:	The disclosure relates to an apparatus including: a first set of one or more field effect transistors (FETs) coupled between a first voltage rail and a load; a second set of one or more FETs coupled between the first voltage rail and the load; a gate voltage control circuit configured to: provide a first set of gate voltages to first and second gates of the first and second sets of one or more FETs in accordance with a first mode of operation, respectively; and provide a second set of gate voltages to the first and second gates of the first and second sets of one or more FETs in accordance with a second mode of operation, respectively; and a voltage droop compensation circuit configured to control an output voltage across the load during a transition from the first mode of operation to the second mode of operation.