SECURE RIGHT SHIFT COMPUTATION SYSTEM, SECURE DIVISION SYSTEM, METHODS THEREFOR, SECURE COMPUTATION APPARATUS, AND PROGRAM

The present invention implements high-speed right shift computation and division in secure computation. According to the present invention, a public value multiplication part 11 calculates [a']=[2ua] from a distributed value [a] of a value "a." A first conversion part 12 converts [a&#...

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Bibliographische Detailangaben
1. Verfasser:	IKARASHI, Dai
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	ADVERTISING CODING OR CIPHERING APPARATUS FOR CRYPTOGRAPHIC OR OTHERPURPOSES INVOLVING THE NEED FOR SECRECY CRYPTOGRAPHY DISPLAY EDUCATION ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY PHYSICS SEALS TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Beschreibung
Zusammenfassung:	The present invention implements high-speed right shift computation and division in secure computation. According to the present invention, a public value multiplication part 11 calculates [a']=[2ua] from a distributed value [a] of a value "a." A first conversion part 12 converts [a'] into additive secret sharing. A right shift computation part 13 calculates i=i into {a'i mod 2u}. A quotient transfer part 16 obtains lower u bits of -Σii into {a'iR}={a'i mod 2b+u}. An addition part 18 calculates {z}=Ei