A VERTICAL ORIENTED SEMICONDUCTOR DEVICE HAVING A REDUCED LATERAL FIELD TERMINATION DISTANCE, AS WELL AS A CORRESPONDING METHOD
A vertical oriented semiconductor device, preferably a BJT, comprising a semiconductor body having a first major surface, the semiconductor body comprising a first region (7) of a first conductivity type and a second region (5) of a second conductivity type, wherein said second region is formed in s...
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Format: | Patent |
Sprache: | eng ; fre ; ger |
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Zusammenfassung: | A vertical oriented semiconductor device, preferably a BJT, comprising a semiconductor body having a first major surface, the semiconductor body comprising a first region (7) of a first conductivity type and a second region (5) of a second conductivity type, wherein said second region is formed in said first region such that a PN junction is provided between said first region and said second region, said junction having a maximum distance to said first major surface, wherein said semiconductor device further comprises a trench (12) extending into the semiconductor body from the first major surface to an extension depth at least equal to said maximum distance, wherein said trench comprises a material arranged to provide electrical insulation to thereby limit a lateral field termination distance associated with said junction. |
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