TYPE III-V SEMICONDUCTOR DEVICE WITH STRUCTURED PASSIVATION

A high-electron-mobility transistor comprises a semiconductor body comprising a barrier region (104) and a channel region (106) that forms a heterojunction with the barrier region such that a two-dimensional charge carrier gas channel (110) is disposed in the channel region, source (120) and drain (122) electrodes disposed on the semiconductor body and laterally spaced apart from one another, a gate structure (124) disposed on the semiconductor body and laterally between the source and drain electrodes, the gate structure being configured to control a conduction state of two-dimensional charge carrier gas, and a first dielectric region (130) that is disposed along the upper surface of the semiconductor body in a lateral region that is between the gate structure and the drain electrode, wherein the first dielectric region comprises aluminum and oxide, and wherein first dielectric region comprises a first end (132) that faces and is laterally spaced apart from the gate structure.