MEMORY DATA READING CIRCUIT AND MEMORY

A stored data reading circuit and a memory are provided, which relate to the field of integrated circuit technologies, to resolve a problem that data read by the stored data reading circuit is inaccurate. The stored data reading circuit (01) includes a first current mirror (301), a first resistor (303), and a voltage amplifier (40). An input end (a) of the first current mirror (301) is connected to a first data reading end (p) of a memory cell, and an output end (b) of the first current mirror (301) is connected to a ground terminal via the first resistor (303). The first current mirror (301) is configured to: amplify a current output at the first data reading end (p) of the memory cell to a first mirror current (IRO) through mirroring, and output the first mirror current (IRO) to the output end (b) of the first current mirror (301). A first input end (c) of the voltage amplifier (40) is connected to the output end (b) of the first current mirror (301), a second input end (d) of the voltage amplifier (40) is configured to receive a reference voltage (Iref), and an output end (e) of the voltage amplifier (40) is connected to an output end of the stored data reading circuit (01).