DFT ARCHITECTURE FOR ANALOG CIRCUITS

An integrated circuit, IC, (100) includes: a first functional analog pin or pad (152); a first analog test bus (162) coupled to the first functional analog pin or pad; first and second analog circuits (124, 134, 144) coupled to the first analog test bus (162); and a test controller (110) configured...

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Bibliographische Detailangaben
1. Verfasser:	COLOMBO, Filippo
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	BASIC ELECTRONIC CIRCUITRY CODE CONVERSION IN GENERAL CODING DECODING ELECTRICITY MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS TESTING
Online-Zugang:	Volltext bestellen
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Beschreibung
Zusammenfassung:	An integrated circuit, IC, (100) includes: a first functional analog pin or pad (152); a first analog test bus (162) coupled to the first functional analog pin or pad; first and second analog circuits (124, 134, 144) coupled to the first analog test bus (162); and a test controller (110) configured to: when the IC is in a functional operating mode, connect an input or output of the first analog circuit to the first analog test bus (162) so that the input or output of the first analog circuit is accessible by the first functional analog pin or pad (152), and keep disconnected an input or output of the second analog circuit from the first analog test bus (162), and when the IC is in a test mode, selectively connect the input or output of the first and second analog circuits (124, 134, 144) to the first analog test bus (162) to test the first and second analog circuits using the first analog test bus (162).