SEMICONDUCTOR PACKAGE, ELECTRONIC EQUIPMENT, AND MANUFACTURING METHOD OF ELECTRONIC EQUIPMENT

SEMICONDUCTOR PACKAGE, ELECTRONIC EQUIPMENT, AND MANUFACTURING METHOD OF ELECTRONIC EQUIPMENT

Information regarding a semiconductor package (10) is written on a stiffener (14) and not on an upper surface (11a) of a semiconductor chip (11). The stiffener (14) is positioned outside an outer edge (11d) of the semiconductor chip (11) and inside an outer edge (17d) of a package base material (17)...

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Bibliographische Detailangaben
Hauptverfasser: SUGAWARA, Nobuyuki, SUZUKI, Ryo, KAMBAYASHI, Asuka
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:Information regarding a semiconductor package (10) is written on a stiffener (14) and not on an upper surface (11a) of a semiconductor chip (11). The stiffener (14) is positioned outside an outer edge (11d) of the semiconductor chip (11) and inside an outer edge (17d) of a package base material (17). Further, a thermally conductive material (31) having fluidity is disposed between the upper surface (11a) of the semiconductor chip (11) and a radiator (50). Therefore, the semiconductor chip provides high cooling performance.