SUBSTRATE, ENCAPSULATION STRUCTURE, AND ELECTRONIC DEVICE

Embodiments of this application provide a substrate, a packaged structure, and an electronic device. The substrate is configured to be electrically connected to a chip. The chip includes a power terminal and a signal terminal. The substrate includes a first substrate and a second substrate mounted o...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: CHEN, Huibin, LIN, Yongzhao, LV, Zhen
Format: Patent
Sprache:eng ; fre ; ger
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Beschreibung
Zusammenfassung:Embodiments of this application provide a substrate, a packaged structure, and an electronic device. The substrate is configured to be electrically connected to a chip. The chip includes a power terminal and a signal terminal. The substrate includes a first substrate and a second substrate mounted on the first substrate. The first substrate includes a first layout, and the first layout is configured to be electrically connected to the power terminal. The second substrate includes a second layout, and the second layout is configured to be electrically connected to the signal terminal. A spacing between lines of the second layout is less than a spacing between lines of the first layout. The substrate provided in this application has a small size and high integration.