INTEGRATED CIRCUIT PACKAGE WITH STACKED INTEGRATED CIRCUIT DIES AND METHOD OF FABRICATING THE SAME

INTEGRATED CIRCUIT PACKAGE WITH STACKED INTEGRATED CIRCUIT DIES AND METHOD OF FABRICATING THE SAME

An integrated circuit (IC) package with stacked die wire bond connections has two stacked IC dies, where a first die couples to a metallization structure directly and a second die stacked on top of the first die connects to the metallization structure through wire bond connections. The IC dies are c...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: KANG, Kuiwon, KIM, Michelle Yejin, TONG, Jialing, BUOT, Joan Rey Villarba
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:An integrated circuit (IC) package with stacked die wire bond connections has two stacked IC dies, where a first die couples to a metallization structure directly and a second die stacked on top of the first die connects to the metallization structure through wire bond connections. The IC dies are coupled to one another through an interior metal layer of the metallization structure. Vias are used to couple to the interior metal layer.