NON-POSTED WRITE TRANSACTIONS FOR A COMPUTER BUS

The invention is directed to a device (500) comprising: an input/output, IO, interface (504) to couple the device to a processor over a link; a plurality of processing engines (518); a plurality of work queues (510, 512) to store descriptors of work to be executed by a processing engine (518) of the...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Van Doren, Stephen R, Harriman, David J, Stalley, Sean O, Agarwal, Ishwar, Marolia, Pratik M, Sankaran, Rajesh M, Vakharwala, Rupin H
Format: Patent
Sprache:eng ; fre ; ger
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Zusammenfassung:The invention is directed to a device (500) comprising: an input/output, IO, interface (504) to couple the device to a processor over a link; a plurality of processing engines (518); a plurality of work queues (510, 512) to store descriptors of work to be executed by a processing engine (518) of the device (500); and an arbiter (514) comprising circuitry to dispatch descriptors in work queues (510, 512) to a processing engine (518); and configuration registers (502) comprising group configuration registers to store data that controls mapping of the processing engines (518) and work queues (510, 512) into groups, each group comprising one or more work queues (510, 512) and one or more processing engines (518) for processing descriptors in the work queues (510, 512) of the group.