HIGH-DENSITY CAPACITOR FOR FOCAL PLANE ARRAYS

A method of fabricating a unit cell of a focal plane array includes providing an integrated circuit substrate, depositing a proximal portion of a dielectric layer on the substrate, and etching a plurality of recess structures into the dielectric layer. Each of the plurality of recess structures defines a partial via and includes sidewalls that extend from the first surface to a bottom portion of the respective recess structure. The method also includes forming a capacitor structure, depositing a distal portion of the dielectric layer on the capacitor structure and a region of the proximal portion of the dielectric layer, forming a plurality of vias passing to the capacitor structure, forming a metal layer, and forming a detector overlying the metal layer. The plurality of vias are positioned between the capacitor structure and the metal layer and electrically connect the capacitor structure to the metal layer.