CARRIER SUBSTRATE FOR SOI STRUCTURE AND ASSOCIATED MANUFACTURING METHOD

CARRIER SUBSTRATE FOR SOI STRUCTURE AND ASSOCIATED MANUFACTURING METHOD

A carrier substrate comprises monocrystalline silicon, and has a front face and a back face. The carrier substrate comprises:a surface region extending from the front face to a depth of between 800 nm and 2 microns, having less than 10 crystal-originated particles (COPs) (as detected by inspecting t...

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Bibliographische Detailangaben
Hauptverfasser: BERTRAND, Isabelle, BOUVEYRON, Romain, ALLIBERT, Frédéric, SCHWARZENBACH, Walter
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:A carrier substrate comprises monocrystalline silicon, and has a front face and a back face. The carrier substrate comprises:a surface region extending from the front face to a depth of between 800 nm and 2 microns, having less than 10 crystal-originated particles (COPs) (as detected by inspecting the surface using dark-field reflection microscopy);an upper region extending from the front face to a depth of between a few microns and 40 microns and having an interstitial oxygen (Oi) content less than or equal to 7.5E17 Oi/cm3 and a resistivity higher than 500 ohm·cm, anda lower region extending between the upper region and the back face and having a micro-defect (BMD) concentration greater than or equal to 1E8/cm3.A method is used to manufacture such a carrier substrate.