STACKING A SEMICONDUCTOR DIE AND CHIP-SCALE-PACKAGE UNIT

There is disclosed a semiconductor package assembly comprising: a substrate (110) having a top substrate surface (112) and a substrate bottom surface (114); a first semiconductor die (120), partially over the substrate and having a die bottom surface having first and second pluralities of I/O pads thereon; a first plurality of localised electrical connection components (LECCs) (150), affixed between the die bottom surface and the substrate top surface and providing electrical connections between the substrate and the first plurality of I/O pads; a second plurality of LECCs (118), affixed to the substrate bottom surface, and for providing electrical connection between the substrate and a circuit board (170); wherein the second plurality of I/O pads are arranged for providing electrical connections to a chip-scale-package unit (130) to be affixed to the first semiconductor die by a third plurality of LECCs (160), and to be positioned in a same horizonal plane as the substrate. Corresponding methods are also disclosed.