REUSING EXECUTED, FLUSHED INSTRUCTIONS AFTER AN INSTRUCTION PIPELINE FLUSH IN RESPONSE TO A HAZARD IN A PROCESSOR TO REDUCE INSTRUCTION RE-EXECUTION

Reusing executed, flushed instructions after an instruction pipeline flush in response to a hazard in a processor to reduce instruction re-execution is disclosed. An instruction processing circuit detects fetched performance degrading instructions (PDIs) in an instruction pipeline that may cause a f...

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Bibliographische Detailangaben

Hauptverfasser:	AL SHEIKH, Rami Mohammad, MCILVAINE, Michael Scott
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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