INTEGRATED CIRCUIT WITH GALVANIC ISOLATION

An integrated circuit (1) with galvanic isolation (CT1, CT2) is described herein. In accordance with one example, the circuit comprises a galvanic insulation barrier including a first isolation element (CT1) configured to separate a first isolation domain (100) from a second isolation domain (200) and a first channel (A) configured to transmit - in a first mode of operation (transparent mode) and across the first isolation element - a logic signal from a first input (INA) in the first isolation domain to a first output (OUTA) in the second isolation domain. The first channel is further configured to transmit - in a second mode of operation (configuration mode) and across the first isolation element - a serial data stream (MOSI) from the first input (INA) to a logic circuit (210) in the second isolation domain, wherein the logic circuit is configured to receive - in the second mode of operation - the serial data stream and to store configuration information included in the serial data stream in a memory.