HANDLING MEMORY-LINES IN A MULTI-CORE PROCESSOR

Methods are provided of handling memory-lines affected by an instruction set to be executed in multi-core processor with affected memory-lines locked. These methods comprise: classifying affected memory-lines into classifications such that affected memory-line(s) mappable to same or affected memory-...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	CEBRIÁN GONZÁLEZ, Juan Manuel, TITOS GIL, José Rubén, KAXIRAS, Stefanos, GÓMEZ HERNÁNDEZ, Eduardo José, ROS BARDISA, Alberto
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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