PACKAGE COMPRISING A SUBSTRATE THAT INCLUDES A STRESS BUFFER LAYER
A package that includes an integrated device, a substrate coupled to the integrated device, and an encapsulation layer coupled to the substrate. The encapsulation layer encapsulates the integrated device. The substrate includes at least one dielectric layer, a plurality of interconnects located in t...
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| creator | FUCHS, Gerhard WIESBAUER, Kurt LEITINGER, Stefan BRUNNER, Sebastian FAULHABER, Horst Uwe RAK, Florian TINAUER, Franz HAAS, Andreas |
| description | A package that includes an integrated device, a substrate coupled to the integrated device, and an encapsulation layer coupled to the substrate. The encapsulation layer encapsulates the integrated device. The substrate includes at least one dielectric layer, a plurality of interconnects located in the at least one dielectric layer, a buffer dielectric layer coupled to the at least one dielectric layer, and a buffer interconnect located at least in the buffer dielectric layer. |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | PACKAGE COMPRISING A SUBSTRATE THAT INCLUDES A STRESS BUFFER LAYER |
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