PACKAGE COMPRISING A SUBSTRATE THAT INCLUDES A STRESS BUFFER LAYER

PACKAGE COMPRISING A SUBSTRATE THAT INCLUDES A STRESS BUFFER LAYER

A package that includes an integrated device, a substrate coupled to the integrated device, and an encapsulation layer coupled to the substrate. The encapsulation layer encapsulates the integrated device. The substrate includes at least one dielectric layer, a plurality of interconnects located in t...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: FUCHS, Gerhard, WIESBAUER, Kurt, LEITINGER, Stefan, BRUNNER, Sebastian, FAULHABER, Horst Uwe, RAK, Florian, TINAUER, Franz, HAAS, Andreas
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:A package that includes an integrated device, a substrate coupled to the integrated device, and an encapsulation layer coupled to the substrate. The encapsulation layer encapsulates the integrated device. The substrate includes at least one dielectric layer, a plurality of interconnects located in the at least one dielectric layer, a buffer dielectric layer coupled to the at least one dielectric layer, and a buffer interconnect located at least in the buffer dielectric layer.