LOAD-AWARE ECMP WITH FLOW TABLES

LOAD-AWARE ECMP WITH FLOW TABLES

A semiconductor chip for implementing load-aware equal-cost multipath routing includes a number of ports and several pipes, each pipe being coupled to a portion of ports on the semiconductor chip, and a central unit consisting of a state machine and multiple databases. The databases contain informat...

Ausführliche Beschreibung

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Bibliographische Detailangaben
1. Verfasser: KADU, Sachin Prabhakarrao
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Beschreibung
Zusammenfassung:A semiconductor chip for implementing load-aware equal-cost multipath routing includes a number of ports and several pipes, each pipe being coupled to a portion of ports on the semiconductor chip, and a central unit consisting of a state machine and multiple databases. The databases contain information regarding a communication network including an overlay network and an underlay network, and the state machine is implemented in hardware and can determine at least one feature of the overlay network and a corresponding group of paths within the underlay network.