SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD
In at least one embodiment, the semiconductor package (1) comprises:- a package body (4),- at least one semiconductor chip (2) arranged in the package body (4), and- at least two electric terminals (3) by means of which the at least one semiconductor chip (2) is electrically connected, the at least...
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creator | BEYER, Harald GUILLON, David |
description | In at least one embodiment, the semiconductor package (1) comprises:- a package body (4),- at least one semiconductor chip (2) arranged in the package body (4), and- at least two electric terminals (3) by means of which the at least one semiconductor chip (2) is electrically connected, the at least two electric terminals (3) protrude from the package body (4),wherein- the package body (4) comprises a first body compound (41) and a second body compound (42), the first body compound (41) has a lower comparative tracking index, CTI, than the second body compound (42), and- the CTI of the second body compound (42) is at least 100 larger than the CTI of the first body compound (41). |
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fre ; ger</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220914&DB=EPODOC&CC=EP&NR=4057335A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220914&DB=EPODOC&CC=EP&NR=4057335A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>BEYER, Harald</creatorcontrib><creatorcontrib>GUILLON, David</creatorcontrib><title>SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD</title><description>In at least one embodiment, the semiconductor package (1) comprises:- a package body (4),- at least one semiconductor chip (2) arranged in the package body (4), and- at least two electric terminals (3) by means of which the at least one semiconductor chip (2) is electrically connected, the at least two electric terminals (3) protrude from the package body (4),wherein- the package body (4) comprises a first body compound (41) and a second body compound (42), the first body compound (41) has a lower comparative tracking index, CTI, than the second body compound (42), and- the CTI of the second body compound (42) is at least 100 larger than the CTI of the first body compound (41).</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNALdvX1dPb3cwl1DvEPUghwdPZ2dHdVcPRzUfB19At1c3QOCQ3y9HNX8HUN8fB34WFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8a4BJgam5sbGpo6GxkQoAQCiqiVm</recordid><startdate>20220914</startdate><enddate>20220914</enddate><creator>BEYER, Harald</creator><creator>GUILLON, David</creator><scope>EVB</scope></search><sort><creationdate>20220914</creationdate><title>SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD</title><author>BEYER, Harald ; GUILLON, David</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP4057335A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2022</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>BEYER, Harald</creatorcontrib><creatorcontrib>GUILLON, David</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>BEYER, Harald</au><au>GUILLON, David</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD</title><date>2022-09-14</date><risdate>2022</risdate><abstract>In at least one embodiment, the semiconductor package (1) comprises:- a package body (4),- at least one semiconductor chip (2) arranged in the package body (4), and- at least two electric terminals (3) by means of which the at least one semiconductor chip (2) is electrically connected, the at least two electric terminals (3) protrude from the package body (4),wherein- the package body (4) comprises a first body compound (41) and a second body compound (42), the first body compound (41) has a lower comparative tracking index, CTI, than the second body compound (42), and- the CTI of the second body compound (42) is at least 100 larger than the CTI of the first body compound (41).</abstract><oa>free_for_read</oa></addata></record> |
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language | eng ; fre ; ger |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD |
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