SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD

SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD

In at least one embodiment, the semiconductor package (1) comprises:- a package body (4),- at least one semiconductor chip (2) arranged in the package body (4), and- at least two electric terminals (3) by means of which the at least one semiconductor chip (2) is electrically connected, the at least...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: BEYER, Harald, GUILLON, David
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:In at least one embodiment, the semiconductor package (1) comprises:- a package body (4),- at least one semiconductor chip (2) arranged in the package body (4), and- at least two electric terminals (3) by means of which the at least one semiconductor chip (2) is electrically connected, the at least two electric terminals (3) protrude from the package body (4),wherein- the package body (4) comprises a first body compound (41) and a second body compound (42), the first body compound (41) has a lower comparative tracking index, CTI, than the second body compound (42), and- the CTI of the second body compound (42) is at least 100 larger than the CTI of the first body compound (41).