WRITE EFFICIENCY IN MAGNETO-RESISTIVE RANDOM ACCESS MEMORIES

An apparatus is provided that includes a memory device including a plurality of sub-arrays, and a memory controller. The memory controller is configured to determine a value of a parameter of a corresponding write pulse for each bit of a word based on a relative importance of each bit, and write eac...

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Bibliographische Detailangaben
Hauptverfasser: GUYOT, Cyril, JEON, Yoocharn, KIM, Yongjune, CASSUTO, Yuval, CHOI, Won Ho
Format: Patent
Sprache:eng ; fre ; ger
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Zusammenfassung:An apparatus is provided that includes a memory device including a plurality of sub-arrays, and a memory controller. The memory controller is configured to determine a value of a parameter of a corresponding write pulse for each bit of a word based on a relative importance of each bit, and write each bit of the word to a corresponding one of the plurality of sub-arrays using the corresponding write pulses.