THREE DIMENSIONAL INTEGRATED SEMICONDUCTOR ARCHITECTURE AND METHOD OF MANUFACTURING THE SAME

THREE DIMENSIONAL INTEGRATED SEMICONDUCTOR ARCHITECTURE AND METHOD OF MANUFACTURING THE SAME

Provided is a semiconductor architecture including a carrier substrate (100), alignment marks (10) provided in the carrier substrate (100), the alignment marks (10) being provided from a first surface of the carrier substrate (100) to a second surface of the carrier substrate (100), a first semicond...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: KIM, Kiil, SEO, Kangill, CHO, Seokwon
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:Provided is a semiconductor architecture including a carrier substrate (100), alignment marks (10) provided in the carrier substrate (100), the alignment marks (10) being provided from a first surface of the carrier substrate (100) to a second surface of the carrier substrate (100), a first semiconductor device (200a) provided on the first surface of the carrier substrate (100) based on the alignment marks (10), a second semiconductor device (200b) provided on the second surface of the carrier substrate (100) based on the alignment marks (10) and aligned with the first semiconductor device (200a).